Field of the Invention
This invention relates generally to analog to digital converters, and more particularly is directed to improved analog to digital converters of the parallel-serial type which are especially suitable for use in video time base correctors.
Description of the Prior Art
Time base correctors are known for processing video or television signals to remove time base errors introduced during signal recording, reproducing or transmission. In such time base correctors, the incoming video signals are converted from analog to digital form and temporarily stored or written in a memory unit at a clocking rate which varies in a manner generally proportional to the time base errors; whereupon, the stored signals are fetched or read out of the memory unit at a standard clocking rate so as to remove the time base errors therefrom, and then the read-out signals are reconverted from digital form back to analog form.
Various types of analog to digital converters have been proposed, for example, for use in time base correctors as described above. In so-called parallel-type analog to digital converters, a sampled analog signal, such as the incoming video signal, is applied to a first compare input of each of a plurality of dual input comparators, while the second compare inputs of the comparators receive respective voltage level reference signals, for example, from respective voltage sources or from a voltage dividing network. The outputs of the comparators are coupled to an encoder which provides a binary or other encoded output or digital character comprised of a predetermined number of bits. Although analog to digital converters of the parallel type are capable of high speed operation, they have a number of inherent disadvantages. First of all, such converters require large numbers of comparators and of associated voltage sources or resistors in the voltage dividing network for providing the respective voltage level reference signals. More particularly, in parallel-type analog to digital converters, the required number of comparators and of respective voltage level reference signals is 2.sup.k -1, with k being the number of bits of binary codes desired in the output from the encoder. Thus, for example, if the output of the encoder is to contain 8-bits of binary codes, the required number of comparators is 2.sup.8 -1 or 255, and a corresponding number of voltage sources are also required. Furthermore, in the described parallel-type analog to digital converters, any inaccuracies in the comparators and/or in the respective voltage level reference signals can produce defects in the signal that is obtained when the digitized output of the analog to digital converter is subsequently reconverted to analog form.
In other existing analog to digital converters of the so-called serial-type, a plurality of dual input comparators are arranged in a series of descending significance, with a digital-analog converter and a subtractor being arranged between each comparator and the next adjacent comparator of lower significance, and with the comparators receiving, at one of the inputs thereof, respective reference signals of descending voltage levels. The most significant comparator compares the sampled analog signal, such as the incoming video signal, with the respective voltage level reference signal to provide the most significant bit of the desired digital character or output. Each of the digital to analog converters converts the output of the preceding comparator or comparators to a corresponding analog signal which is then substracted, in the respective subtractor, from the incoming video signal to attain a difference signal which is compared in the next comparator with the respective voltage level reference signal for providing another respective bit of the desired digital output. The serial-type analog to digital converters, as briefly described above, require far fewer circuit elements than the parallel-type analog to digital converters. For example, if the digital output is to be made up of k binary bits, the serial-type converter requires k comparators, k voltage sources or the like for providing the voltage level reference signals, k-1 digital-analog converters, and k-1 subtractors. However, the serial-type analog to digital converters are not capable of high speed operation.
In view of the above, it has been proposed, for example, as disclosed in U.S. Pat. No. 3,860,952, to provide a so-called parallel-serial analog to digital converter for use in a video time base corrector with a view to attaining a high operating speed by means of a relatively fewer number of circuit elements as compared with the existing parallel-type analog to digital converters. In the known parallel-serial analog to digital converter, each sampled portion of an incoming video or other analog signal is converted to a digital character in two 4-bit parallel conversions which occur serially. The first parallel conversion is effected by a number of coarse comparators having first inputs which receive the sampled incoming analog signal and second inputs which receive voltage level reference signals of magnitudes descending in relatively large unit increments, and an encoder receives the outputs of the comparators for providing an encoded output specifying the four most significant bits of an 8-bit digital character representing the sampled incoming analog signal. Such output from the encoder of the first parallel conversion is converted to analog form and subtracted from the sampled incoming analog signal to provide an analog difference signal which is subjected to a second parallel conversion. The second parallel conversion is effected by a number of fine comparators having first inputs which receive the analog difference signal and second inputs which receive voltage level reference signals of magnitudes descending in relatively small unit increments, with the maximum voltage level reference signal applied to a fine comparator being smaller than the minimum voltage level reference signal applied to a coarse comparator by one of said small unit increments. Finally, an encoder receives the outputs of the fine comparators for providing an encoded output specifying the four least significant bits of the 8-bit digital character representing the sampled incoming analog signal.
It has been found that the existing analog to digital converters of the parallel-serial type, as described above, are also disadvantageous in that inaccuracies in the comparators, particularly of the first parallel conversion, and/or of the respective voltage level reference signals can produce defects in the signal that is obtained when the digitized output of the analog to digital converter is subsequently reconverted to analog form.